denormal.h

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/***************************************************************************/
#ifndef AURESERVOIR_DENORMAL_H__
#define AURESERVOIR_DENORMAL_H__

#ifdef __SSE__
#include <xmmintrin.h>
#endif

#include <flens/flens.h>
#include "auexcept.h"

namespace aureservoir
{

const float SINGLE_DENORMAL_DC = 1.0E-25;

const double DOUBLE_DENORMAL_DC = 1.0E-30;

inline void set_denormal_flags()
  throw(AUExcept)
{
#ifdef __SSE__

  unsigned long cpuflags = 0;

#ifndef USE_X86_64_ASM

  asm volatile (
    "mov $1, %%eax\n"
    "pushl %%ebx\n"
    "cpuid\n"
    "movl %%edx, %0\n"
    "popl %%ebx\n"
    : "=r" (cpuflags)
    :
    : "%eax", "%ecx", "%edx", "memory"
  );

#else

  asm volatile (
    "pushq %%rbx\n"
    "movq $1, %%rax\n"
    "cpuid\n"
    "movq %%rdx, %0\n"
    "popq %%rbx\n"
    : "=r" (cpuflags)
    : 
    : "%rax", "%rcx", "%rdx", "memory"
  );

#endif // USE_X86_64_ASM

  if (! (cpuflags & 1<<25) )
    throw AUExcept("set_denormal_flag: your processor doesn't have SSE support, DAZ and FZ denormal handling not activated !");

  // do we need SSE2 ?
//   if (! (cpuflags & 1<<26) )
//     throw AUExcept("set_denormal_flag: your processor doesn't have SSE2 support, DAZ and FZ denormal handling not activated !");

  // set DAZ and FZ bits
  int oldMXCSR = _mm_getcsr(); //read the old MXCSR setting
  int newMXCSR = oldMXCSR | 0x8040; // set DAZ and FZ bits
  _mm_setcsr( newMXCSR ); //write the new MXCSR setting to the MXCSR

#else

  throw AUExcept("set_denormal_flag: you did not compile with SSE support (-mfpmath=sse -msse), DAZ and FZ denormal handling not activated !");

#endif // __SSE__
}

inline void denormals_add_dc(float *data, int size)
{
  for(int i=0; i<size; ++i)
    data[i] += SINGLE_DENORMAL_DC;
}

inline void denormals_add_dc(double *data, int size)
{
  for(int i=0; i<size; ++i)
    data[i] += DOUBLE_DENORMAL_DC;
}

} // end of namespace aureservoir

#endif // AURESERVOIR_DENORMAL_H__

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